Accelerating the layout of advanced packaging: TSMC, Intel, ASE Group, Samsung ....

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As we all know, the wave of AI is sweeping the world, and higher requirements have been put forward for semiconductor chip performance. Advanced packaging technology plays a crucial role in reducing chip power consumption, improving computing performance, etc., coupled with the promotion of big data and other industries, the current advanced packaging technology is also receiving more and more attention.

According to foreign media reports, the U.S. Department of State and the Inter-American Development Bank (IDB) recently announced the launch of a ‘Western Hemisphere Semiconductor Initiative (CHIPS ITSI)’, aimed at promoting Mexico, Panama and Costa Rica and other countries in the Americas to improve the semiconductor production.

According to the report, the programme is expected to be funded by the Chip and Science Act, will enhance the countries of the Americas ‘assembly, testing and packaging of semiconductor capacity’. It is reported that the first batch of projects will be carried out in Mexico, Panama and Costa Rica, the future to include other countries in the Americas.

Earlier this month (10 July local time), the U.S. Department of Commerce announced that it would allocate up to $1.6 billion in funding for the development of new computer chip packaging technology.

In order to accelerate the semiconductor advanced packaging capacity, the U.S. government put forward the ‘National Advanced Packaging Manufacturing Programme’ (NAPMP), aimed at large-scale investment in research and development, the establishment of leading domestic semiconductor advanced packaging capacity.

According to the plan, ‘National Advanced Packaging Manufacturing Programme’ covers five R & D areas, respectively, equipment, tools, processes and process integration; power delivery and thermal management; connector technology, including photonics and radio frequency (RF); Chiplet ecosystem; co-design / electronic design automation (EDA). The U.S. government will invest up to $1.6 billion in innovation funding in these five R&D areas, and it is expected that each company that qualifies for an R&D project grant will receive a total of up to $150 million in grants.

Laurie E. Locascio, Deputy Secretary of Commerce and Director of the National Institute of Standards and Technology (NIST), said that the proposed funding for the National Advanced Packaging Manufacturing Initiative is part of a $52 billion authorisation in the Chip and Science Act of 2022, which focuses on supporting companies to innovate in new chip packaging technologies.

At present, international semiconductor manufacturers, including TSMC, Intel, Sun Micron, Samsung, etc., have accelerated their layout because of their optimism in the advanced packaging market.

From TSMC's investment direction this year, advanced packaging is one of its key layout of the business, especially CoWoS advanced packaging and fan-out panel level packaging (FOPLP) is actively force. It is reported that TSMC CoWoS packaging capacity will be doubled this year, and 2025 CoWoS packaging capacity will also be doubled from 2024, fan-out panel level packaging (FOPLP) technology, is expected to 3 years after the technology can be mature.

Earlier this year, Intel said it had opened a Fab 9 chip factory in New Mexico, USA. It is reported that the factory is one of Intel's first operating bases for large-scale production of 3D advanced semiconductor packaging technology.

Keyvan Esfarjani, Intel's executive vice president and chief global operating officer, said in a statement, ‘This is the only U.S. facility that mass-produces the world's most advanced packaging solutions.’

In mid-July, Sunrise Investment Control announced that its Sunrise Semiconductor ISE Labs will open a second U.S. facility in San Jose, California, to expand its test service capabilities.

Samsung, on the other hand, plans to increase the investment in the new plant in Tyler, Texas, United States, from 17 billion to more than 40 billion U.S. dollars, the construction of advanced packaging-related research and development centres and facilities, and annual investment of more than 2 trillion won, the expansion of advanced packaging production lines.

Earlier this year in July, Japan's semiconductor materials maker Resonac (Showa Denko) announced that it will be with Azimuth, KLA, Kulicke & Soffa, Moses Lake Industries, MEC, ULVAC, NAMICS, TOK, TOWA, and Resonac and other 10 companies in the U.S. Silicon Valley, the establishment of a next-generation Semiconductor Packaging R&D Alliance ‘US-JOINT’.

The alliance aims to develop post-process technology called cutting-edge packaging, with the aim of verifying new packaging structures that will be practical in 5 to 10 years. Construction and installation of the plant will begin this year, and it is expected to be fully operational by 2025.

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